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The truth table of each individual gate is:
| input D | input C | input B | input A | output |
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 | 0 |
| NOR gate truth table |
where '0' represents a LOW voltage, and '1' represents a HIGH voltage. Shading is intended to make the table easier to follow.
You can investigate the behaviour of one of the 4-input NOR gates using this circuit:
| 4-input NOR gate test circuit |
The inputs of the gate must be connected, either to LOW or to HIGH, and must not be left open circuit. This is the function of the input switches with their pull-down resistors. To avoid loading the output of the gate, a transistor switch indicator circuit should be used.
It is good practice with CMOS circuits to insert a decoupling capacitor, 47 µF or 100 µF, across the power supply. (This helps to prevent the transfer of spikes along the power supply rails.)
Here is the circuit on prototype board:
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In the prototype circuit, it is not essential to make connections to the unused gate. However, in any final circuit, all unused CMOS inputs must be connected either to HIGH or to LOW. Make it an absolute rule that CMOS inputs are never left open circuit.
There is no problem with CMOS outputs. Worry about the inputs and leave any unused outputs unconnected.
The links below allow you to download documents in
Adobe Acrobat ©, PDF, format. In the unlikely event that you don't already have Acrobat Reader, you can download the latest version direct from Adobe:
4002B data sheet (Philips Semiconductors, 1995)
4002B data sheet (ST Microelectronics, 2004)
4001 2-input NOR
4025 3-input NOR
4078 8-input NOR