| 4011 | 2-input NAND gates |
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| Technology: CMOS | Power supply: 3-15 V | 14-pin DIL |
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The 4011 has four separate 2-input NAND |
The truth table of each individual gate is:
| input B | input A | output |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
where '0' represents a LOW voltage, and '1' represents a HIGH voltage.
You can investigate the behaviour of a single NAND gate using this circuit:

The inputs of the gate must be connected, either to LOW or to HIGH, and must not be left open circuit. This is the function of the input switches with their pull-down resistors. To avoid loading the output of the gate, a transistor switch indicator circuit should be used. It is good practice with CMOS circuits to insert a decoupling capacitor, 47 µF or 100 µF, across the power supply. (This helps to prevent the transfer of spikes along the power supply rails.)
Don't forget -
-
Connect pin 14 of the 4011 to +9 V and pin 7 to 0 V.
This is the test circuit built on prototype board:
An important property of NAND gates is that they can be linked to perform the functions of other logic gates. In fact, any logic function can be implemented using only NAND gates:

If you have designed a system which needs a NAND gate, a NOT gate and an AND gate, you might think of using a separate integrated circuit for each logic function. This would leave you with a circuit in which there were three unused NAND gates, five unused NOT gates and three unused AND gates. It is a lot more efficient (and cheaper) to use NAND gates to implement the other functions. All three gates can be made with just one 4011 integrated circuit.
What happens when NAND gates are linked like this?

It is easy to work out the truth table for this circuit. When you do this, you will discover that the circuit does not give the truth table for a 3-input NAND gate. Unlike AND and OR gates, NAND gates cannot be cascaded in this way.
It is possible to make a 3-input NAND gate using 2-input NAND gates, but the circuit requires an extra gate:

3-input, 4-input, and 8-input NAND gates are available in integrated circuit form, as listed in the links section.
A useful application of NAND gates is in making a SET/RESET bistable, or latch. Here is the circuit:

Once again, notice that you must have a switch/resistor voltage divider at the inputs to the NAND gates. With a NAND gate latch, the inputs are held HIGH and pulsed LOW. This means that you need pull-up resistors. (Compare this circuit with a SET/RESET latch bistable built using NOR gates.)
To avoid loading the outputs of the latch, transistor switch/LED indicators are used. It is a common mistake to connect LEDs directly to the latch outputs:

Even with current-limiting resistors connected in series with the LEDs, this circuit might not work because the voltages at the outputs of the latch are pulled downwards and may not count as HIGH when they are supposed to be HIGH.
If you connect LEDs without current-limiting resistors, the circuit cannot possibly work.
This is the correct circuit built on prototype board:
Operate the SET and RESET switches to confirm the latching action of the bistable.
Cross references in the Beastie Zone:
NAND GATE
BISTABLE
4012 4-input NAND, 4023 3-input NAND, 4068 8-input NAND, 4093 2-input Schmitt trigger NAND.
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