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Pin connections	Basic operation
Truth table	LINKS . . .

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Pin connections

The 4012 contains two 4-input NAND gates.

NC = no connection

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Truth table

The truth table of a 4-input NAND gate is:

In the table, '0' represents a LOW voltage, and '1' represents a HIGH voltage.

You can work out the correct number of lines in the truth table from 2 ⁿ , where n is the number of inputs. Here, n = 4, so there are 2 ⁴ = 16 lines. As you can see, the output of the gate is '1' when one or more of the four inputs are '0'. The output becomes '0' only when all four inputs are '1'.

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Basic operation

You can investigate the behaviour of one of the 4-input NAND gates using this circuit:

The inputs of the gate must be connected, either to LOW or to HIGH, and must not be left open circuit. This is the function of the input switches with their pull-down resistors. To avoid loading the output of the gate, a transistor switch indicator circuit should be used. It is good practice with CMOS circuits to insert a decoupling capacitor, 47 µF or 100 µF, across the power supply. (This helps to prevent the transfer of spikes along the power supply rails.)

Don't forget - - Connect pin 14 of the 4012 to +9 V and pin 7 to 0 V.

This is the test circuit built on prototype board:

4012

In the prototype circuit, it is not essential to make connections to the unused gate. However, in any final circuit, all unused CMOS inputs must be connected either to HIGH or to LOW. Make it an absolute rule that CMOS inputs are never left open circuit.

There is no problem with CMOS outputs. Worry about the inputs and leave any unused outputs unconnected.

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Links

Cross references in the Beastie Zone:

NAND GATE

4011 2-input NAND, 4023 3-input NAND, 4068 8-input NAND, 4093 2-input Schmitt trigger NAND.

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