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4093B Quad 2-input Schmitt trigger NAND gates hot stuff !! hot stuff !! hot stuff !!



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1. Pin connections

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4093B pin connections

The 4093 available from Rapid Online has four separate 2-input Schmitt trigger NAND gates which you can use independently.

 
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2. Truth table

The truth table of each individual gate is:

input B input A output
0 0 1
0 1 1
1 0 1
1 1 0
NAND gate truth table

where '0' represents a LOW voltage, and '1' represents a HIGH voltage.

 
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3. Schmitt trigger inputs.


 

Typical CMOS inputs have a single threshold. If the voltage applied to the input is less than half the power supply voltage, it counts as a '0', while if the voltage is more than half the power supply voltage, it counts as a '1'.

A Schmitt trigger input has two different thresholds. The best way of understanding how this works is to investigate the behaviour of a Schmitt trigger device in a practical circuit. You are going to test one of the gates in the 4093 as follows:

Schmitt trigger input test circuit

The inputs of the gate are connected together. This eliminates the middle two rows of the truth table so that the gate follows the truth table of a NOT gate:

input A output
0 1
1 0
NOT gate truth table

To avoid loading the output of the gate, a transistor switch indicator circuit should be used.

It is good practice with CMOS circuits to insert a decoupling capacitor, 47 µF or 100 µF, across the power supply. (This helps to prevent the transfer of spikes along the power supply rails.)

  •   Beasties need power supplies! Don't forget to connect pin 14 of the 4093 to +9 V and pin 7 to 0 V.

Here is the test circuit on prototype board:

 

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down open in a new window 4093 pins Schmitt trigger input test circuit

To make an effective contact, wires must be soldered to the potentiometer terminals.

Start with the potentiometer rotated so that Vin, measured by the voltmeter, is close to 0 V.

The output of the Schmitt NAND gate will be HIGH and the LED will be illuminated.

Now, slowly increase Vin, noting the voltage at which the output of the NAND gate suddenly snaps LOW, causing the LED to switch OFF. This is the first Schmitt trigger threshold. Continue rotating the potentiometer until Vin is close to 9 V.

Slowly decrease Vin. Confirm that the output of the gate does not snap HIGH when the first Schmitt trigger threshold is reached. Instead, you need to keep turning the potentiometer until a new, lower threshold point is reached. This is the second Schmitt trigger treshold.

Repeat the experiment several times: the device has two distinct thresholds depending on whether you start adjusting the voltage from 0 V, or from 9 V. A device like this is said to show hysteresis. Typically, these thresholds are located at 1/3 and 2/3 of the power supply voltage, 3 V and 6 V with a 9 V power supply.

Plotting a graph of output voltage against input voltage gives the result shown in the next diagram:

Graph showing the action of a Schmitt trigger input

Click the button to start the animation and note the result as the input voltage is first increased, then decreased.

Why would you want a Schmitt trigger logic gate?

A gate with a single switching threshold behaves erratically if the input signal is noisy or degraded. If the input voltage is close to the threshold, the output is likely to oscillate between 0 and 1, or may be somewhere in between. With a Schmitt trigger gate, this is impossible. The output is either 0 or 1 and cannot be intermediate. Schmitt trigger devices are often used to 'clean up' noisy input signals, passing on a tidy sequence of 0's and 1's to other parts of the circuit. This is what Schmitt trigger devices are for.

A useful bonus of Schmitt trigger action is that you can make an astable using one resistor, one capacitor and a single inverting Schmitt trigger device, that is, a NOT gate, NOR gate, or NAND gate.

Schmitt trigger NAND gate astables are described in a later section on this page.

 

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4. NAND gate operation.

With HIGH and LOW signals close to the limits of the power supply, Schmitt NAND gates behave in the same way as conventional NAND gates. You can confirm this by building and testing this circuit:

Schmitt NAND gate test circuit

Here is the circuit on prototype board:

down up open in a new window 4093 pins Schmitt NAND gate test circuit

Work through the truth table combinations to confirm that this circuit obeys the truth table for NAND.

 

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5. Other gates made with NAND


An important property of NAND gates is that they can be linked to perform the functions of other logic gates. In fact, any logic function can be implemented using only NAND gates. This works with Schmitt NAND gates, just as well as with conventional NAND gates:

NAND gate circuits for other logic gates

If you have designed a system which contains a NAND gate integrated circuit, it can be convenient and cost-effective to implement other logic functions using spare NAND gates which would otherwise be unused.

As an example, here is the prototype board layout for an OR gate built with NAND gates:

down up open in a new window 4093 pins OR gate built using Schmitt NAND gates

Work through the truth table combinations to confirm that this circuit obeys the truth table for OR. Modify the circuit to make a NOR gate.

 

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6. Cascading

What happens when NAND gates are linked like this?

Cascading NAND gates

Work out the truth table for this circuit. When you do this, you will discover that the circuit does not give the truth table for a 3-input NAND gate. Unlike AND and OR gates, NAND gates cannot be cascaded in this way.

It is possible to make a 3-input NAND gate using 2-input NAND gates, but the circuit requires an extra gate:

3-input NAND gate

The truth table for this circuit is:

input C input B input A output
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0

3-input, 4-input, and 8-input NAND gates are available in integrated circuit form, as listed in the links section.

 
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7. NAND gate bistable

A useful application of NAND gates is to make a SET/RESET bistable, latch, or flip-flop. This circuit works equally well with Schmitt trigger NAND gates:

NAND gate bistable

Once again, notice that you must have a switch/resistor voltage divider at the inputs to the NAND gates. With a NAND gate latch, the inputs are held HIGH and pulsed LOW. This means that you need pull-up resistors. Compare this circuit with a SET/RESET latch bistable built with conventional NAND gates.

To avoid loading the outputs of the latch, transistor switch/LED indicators are used. It is a common mistake to connect LEDs directly to the latch outputs:

Bad circuit: directly connected LEDs take too much current from the outputs of the latch

Even with current-limiting resistors connected in series with the LEDs, this circuit might not work because the LEDs take too much current from the ouptuts of the latch so that the output voltages are pulled downwards and may not count as HIGH when they are supposed to be HIGH.

If you connect LEDs without current-limiting resistors, the circuit cannot possibly work.

Here is the correct circuit on prototype board:

down up open in a new window 4093 pins NAND gate bistable

When the power supply is first connected, you can't predict whether the latch will be SET or RESET.

Operate the switches one at a time to see the circuit in action. When the latch is SET, what happens if you press the SET button again?

If you press both switches, both LEDs will be ON. This follows from the truth table for an individual NAND gate. You won't be able to release both switches simultaneously, so that the latch will flip one way or the other when you let go.

The behaviour of the circuit can be summarised in truth table form:

SET RESET Q NOT-Q
1 1 0 1
0 1 1 0
1 1 1 0
1 0 0 1
1 1 0 1
0 0 1 1
1 1 ? ?

This is a different sort of truth table in which the sequence of events is recorded. In the first line, neither switch is pressed and the bistable is in its RESET state.

In the second and third lines the SET switch is pressed and then released. The bistable is forced into its SET state and remains SET when the switch is released.

Operating the RESET switch puts the bistable into its RESET state, fourth line. When the RESET switch is released, the bistable remains in its RESET state, fifth line.

The last two lines show what happens if both switches are pressed. This is known as a disallowed state because the next stage in the sequence cannot be predicted.

The NAND gates aren't damaged by pressing both switches at the same time. However, since nothing useful happens, circuits which use SET/RESET bistables are designed to avoid the disallowed state.

 

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8. Schmitt NAND astables

8.1 Free-running astable

It is easy to build an astable using one of the Schmitt trigger NAND gates inside the 4093:

Schmitt trigger astable

The timing components are the 1 MΩ resistor and the 1 μF capacitor. Here is the circuit on prototype board:

down up open in a new window 4093 pins Schmitt trigger astable

You might notice that the LED is illuminated for longer when power is first applied. To understand why click to draw the graph:

Graph showing Schmitt trigger astable input and output voltages

Initially, the capacitor is empty and must charge from 0 to 6 V to reach the first Schmitt trigger threshold. When this is reached, the output of the NAND gate snaps LOW and the capacitor starts to discharge. When the second threshold is reached, 3 V with a 9 V power supply, the output of the NAND gate snaps HIGH once more. This time, the capacitor is already partly charged and the duration of the second pulse corresponds with the time take to charge from 3 V to 6 V.

The HIGH and LOW times of the astable pulse output each correspond to a half charge time, 0.69RC. The period of the pulse waveform is 0.69RC + 0.69RC and the frequency of the pulses is given by:

Schmitt astable

In practice, the Schmitt trigger thresholds are not fixed exactly and it is better to approximate the frequency as:

Schmitt astable

This is a great way of making a cheap and cheerful astable for testing a counter circuit, but is not the astable to choose if you want an exact frequency.

8.2 Gated astable

You can convert your free-running astable into a gated astable:

Gated astable using Schmitt trigger NAND gate

Modify your prototype board circuit as follows:

up open in a new window 4093 pins Gated astable using Schmitt trigger NAND gate

With the component values shown, the LED should flash at about 10 Hz. Use the oscilloscope to investigate the waveforms at pin 3 of the 4093, the output of the astable, and at pin 2, where you can see the capacitor charging and discharging.

All in all, the 4093 is a really useful and versatile device.

 

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9. Links


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reference book..

9.1 Data sheets

The links below allow you to download documents in Adobe Acrobat ©, PDF, format. In the unlikely event that you don't already have Acrobat Reader, you can download the latest version direct from Adobe:

open document 4093B data sheet (NXP, 2008)

open document 4093B data sheet (ST Microelectronics, 2007)

9.2 DOCTRONICS links

4012 4011 2-input NAND

4012 4012 4-input NAND

4023 3-input NAND

4068 8-input NAND

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