Week 3 : 'Bleep-bleep' circuit |
| In previous sessions, you have looked at circuits for generating pulses at slow frequencies and investigated the 4017 cmos decade counter in detail. This week, you are going to build a circuit to produce a pulsed audible alarm. This will be triggered when the tenth output of the counter goes HIGH, illuminating the final LED. |
The noisy bit requires a gated astable. Start with this circuit:

You should recognise this as a Schmitt trigger NAND gate astable. To build this circuit, you need a 4093 cmos integrated circuit, with pin connections as follows:

Here is the prototype board layout:
Remember to give the 'beastie' a power supply.
Calculate the approximate astable frequency expected from the formula:
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Think about which resistance and capacitance measurement units you should use, and about how these will affect the frequency units. (Refer back to Week 1, if required.)
Write down your expected frequency value:
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Determine the period of the astable waveform using the oscilloscope. Write down this value:
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Calculate the actual frequency of your astable. What formula do you need to use?
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The two frequencies should be moderately close, but will probably not be exactly the same.
Next, modify your circuit, as follows:

On the prototype board, you need to remove the wire link between pins 1 and 2 of the 4093 and then insert a flying lead around 10-15 cm long:
Connect the free end of the flying lead to 0 V by pushing into the 0 V power supply rail. Check on the oscilloscope screen. Is the astable still pulsing?
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Now connect the free end of the flying lead to +9 V. Is the astable still pulsing?
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You can use the flying lead as a control input to turn the astable pulses ON and OFF.
To keep the astable working when the free end of the flying lead is not connected either to +9 V, or to 0 V, you should add a 10 kW pull-up resistor to your circuit:

The prototype board becomes:
This is a practical circuit for a gated astable. It produces a frequency of around 1 kHz, close to the centre of the audible range.
A pulsed alarm sound is one which is turned ON and OFF by means of a control input. To produce a pulsed alarm, you use a SLOW astable to turn the FAST one ON and OFF.
Build a SLOW astable using another gate in the 4093:

Which component value has been changed to make this astable pulse more slowly?
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Calculate the expected frequency of the SLOW astable:
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The prototype board diagram shows you where to insert the new components. You do not need to change any of the connections for the FAST astable. (The diagram has been altered to show the positions of all the components clearly.)
Estimate the actual frequency of your SLOW astable, from the waveform visible on the oscilloscope screen.
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Check that the flying lead for the SLOW astable works in the same way as the one for the FAST astable.
Now join your two astables together:

The prototype board will look like this:
Write down an explanation of the waveform observed at the output of the FAST astable, Vout in the circuit diagram:
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What effect is produced by connecting the free end of the remaining flying lead to 0 V?
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(This might not be the result you expect!)
When the flying lead of the SLOW astable is connected to 0 V, the SLOW astable stops pulsing. However, the output of the SLOW astable is held HIGH. This behaviour follows from the NAND gate truth table. This HIGH voltage enables the FAST astable, so that it pulses continuously.
It is not difficult to see the solution to this problem. All you need to do is to insert a NOT gate between the output of the SLOW astable and the control input of the FAST astable:

Modify your prototype board, as follows:
Connect the flying lead to 0 V. What happens to the output of the FAST astable?
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Look carefully at the output of the FAST astable. What is the logic level at the output, when the FAST astable is stopped?
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To reduce the possibility of damage to the subsystems which follow, it is probably better to add a second NOT gate, so that the final output of the pulsing circuit is held LOW when the astables are stopped:

Your prototype board needs a few more changes:
This circuit gives you the correct function for a pulsed audible alarm. Although it will have taken you some time to arrive at this result, the operation of the circuit is fairly straightforward and easy to understand.
After all this work, it is time to hear the audible signal. The output of a logic gate can provide up to 10 mA of current. It depends on the output device you want to use whether this will be enough. Very often you will want to add an amplfier subsystem. This does not increase the voltage level of the signal from the logic gate, but it does increase the current and therefore the power available to drive the output device.
A suitable circuit for this application is:

Your final prototype board should look like this:
For this final stage in construction, you should be able to work out for yourself which is the 1 kW resistor, which is the 2.2 kW resistor and where the other components should be connected.
Experiment to find out what signals are present at different points in the amplifier circuit and think about the functions of the different components used.
Try changing the resistor/capacitor values of the SLOW and FAST astables to produce a pleasing alarm sound.
The pulses from a gated astable can be turned ON and OFF by connecting an appropriate logic signal to a control input.
You can exploit this behaviour to make a pulsed alarm in which a SLOW astable switches ON and OFF the pulses from a FAST astable.
The 4093 cmos integrated circuit gives a complete solution to the problem of designing the pulse-producing circuit.
A current amplifier is often needed when you want to use logic signals to drive an output device.